I’m an FPGA engineer currently working as part of the OpenCL team at Intel – PSG (formerly Altera) where we are building high-level design technologies to help software and FPGA developers accelerate compute workloads on Intel FPGAs.
I started my career in the video broadcast domain building FPGA-based products for professional video ingest and encoding. More recently my focus has shifted to compute acceleration where I’ve become well-versed in high-performance FPGA design techniques and methodologies.
Get in touch with me at anandh@anandhv.com